Rajsuman, R.: search on Z-Library

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1

Iddq testing for CMOS VLSI

Journal:

Proceedings of the IEEE

Year:

2000

Language:

english

File:

PDF, 1.59 MB

english, 2000

2

Design of CMOS circuits for stuck-open fault testability

Jayasumana, A.P., Malaiya, Y.K., Rajsuman, R.

Journal:

IEEE Journal of Solid-State Circuits

Year:

1991

Language:

english

File:

PDF, 406 KB

english, 1991

3

Testing Embedded Cores

Anderson, T.L., Chandramouli, R., Dey, S., Hemmady, S., Mallipeddi, C., Rajsuman, R., Walther, R., Zorian, Y.

Journal:

IEEE Design & Test of Computers

Year:

1997

Language:

english

File:

PDF, 302 KB

english, 1997

4

[IEEE 2002 International Test Conference - Baltimore, MD, USA (7-10 Oct. 2002)] Proceedings. International Test Conference - Can IC test learn from how a tester is tested

Year:

2002

Language:

english

File:

PDF, 81 KB

english, 2002

5

Design and test of large embedded memories: An overview

Journal:

IEEE Design & Test of Computers

Year:

2001

Language:

english

File:

PDF, 129 KB

english, 2001

6

[IEEE Comput. Soc Eleventh Asian Test Symposium - Guam, USA (18-20 Nov. 2002)] Proceedings of the 11th Asian Test Symposium, 2002. (ATS '02). - Extending EDA environment from design to test

Year:

2002

Language:

english

File:

PDF, 568 KB

english, 2002

7

[IEEE Comput. Soc. Press Records of the 1993 IEEE International Workshop on Memory Testing - San Jose, CA, USA (9-10 Aug. 1993)] Records of the 1993 IEEE International Workshop on Memory Testing - Algorithms to test PSF and coupling faults in random access memories

Year:

1993

Language:

english

File:

PDF, 481 KB

english, 1993

8

[IEEE 2006 IEEE International Test Conference - Santa Clara, CA, USA (2006.10.22-2006.10.27)] 2006 IEEE International Test Conference - Changing Test Industry: The Analysts' Perspective

Gold, Amy, Rajsuman, Rochit

Year:

2006

Language:

english

File:

PDF, 562 KB

english, 2006

9

Guest editorial [Special section on innovations in VLSI automatic test equipment (ATEs)]

Das, S.R., Rajsuman, R.

Journal:

IEEE Transactions on Instrumentation and Measurement

Year:

2003

Language:

english

File:

PDF, 205 KB

english, 2003

10

[IEEE ASP-DAC 2004: Asia and South Pacific Design Automation Conference 2004 - Yohohama, Japan (27-30 Jan. 2004)] ASP-DAC 2004: Asia and South Pacific Design Automation Conference 2004 (IEEE Cat. No.04EX753) - New opportunities with the open architecture test system

Year:

2004

Language:

english

File:

PDF, 64 KB

english, 2004

11

Architecture and design of an open ATE to incubate the development of third-party instruments

Rajsuman, R., Masuda, N., Yamashita, K.

Journal:

IEEE Transactions on Instrumentation and Measurement

Year:

2005

Language:

english

File:

PDF, 5.75 MB

english, 2005

12

Architecture, design, and application of an event-based test system

Journal:

IEEE Transactions on Instrumentation and Measurement

Year:

2003

Language:

english

File:

PDF, 4.17 MB

english, 2003

13

Implementation of switch network logic in SOI

Journal:

IEEE Journal of Solid-State Circuits

Year:

1990

Language:

english

File:

PDF, 441 KB

english, 1990

14

Guest Editorial First Special Section of the IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT in the Area of VLSI Testing—Future of Semiconductor Test

Das, S.R., Rajsuman, R.

Journal:

IEEE Transactions on Instrumentation and Measurement

Year:

2005

Language:

english

File:

PDF, 41 KB

english, 2005

15

[ACM Press 24th ACM/IEEE conference proceedings - Miami Beach, Florida, United States (1987.06.28-1987.07.01)] 24th ACM/IEEE conference proceedings on Design automation conference - DAC '87 - On accuracy of switch-level modeling of bridging faults in complex gates

Rajsuman, R., Malaiya, Y. K., Jayasumana, A. P.

Year:

1987

Language:

english

File:

PDF, 796 KB

english, 1987

16

CMOS stuck-open fault testability

Rajsuman, R., Malaiya, Y.K., Jayasumana, A.P.

Journal:

IEEE Journal of Solid-State Circuits

Year:

1989

Language:

english

File:

PDF, 224 KB

english, 1989

17

[Int. Test Conference International Test Conference 1996. Test and Design Validity - Washington, DC, USA (20-25 Oct. 1996)] Proceedings International Test Conference 1996. Test and Design Validity - Challenge of the 90's: testing CoreWare/sup (TM/) based ASICs

Year:

1996

Language:

english

File:

PDF, 110 KB

english, 1996

18

[IEEE Twenty-Third Asilomar Conference on Signals, Systems and Computers, 1989. - Pacific Grove, California, USA (1989.10.30-1989.11.1)] Twenty-Third Asilomar Conference on Signals, Systems and Computers, 1989. - On designing robust testable PLA for path delay faults

Gupta, B., Rajsuman, R.

Year:

1989

Language:

english

File:

PDF, 166 KB

english, 1989

19

Analysis and simulation of multiple-ring token networks

Vasko, D.A., Rajsuman, R.

Journal:

IEE Proceedings - Computers and Digital Techniques

Year:

1994

Language:

english

File:

PDF, 481 KB

english, 1994

20

[IEEE Comput. Soc. Press [1990] 23rd Annual Workshop and Symposium@m_MICRO 23: Microprogramming and Microarchitecture - Orlando, FL, USA (27-29 Nov. 1990)] [1990] Proceedings of the 23rd Annual Workshop and Symposium@m_MICRO 23: Microprogramming and Microarchitecture - On the testing of microprogrammed processor

Hwang, S., Rajsuman, R., Malaiya, Y.K.

Year:

1990

Language:

english

File:

PDF, 605 KB

english, 1990

21

[IEEE Twenty-Third Asilomar Conference on Signals, Systems and Computers, 1989. - Pacific Grove, California, USA (1989.10.30-1989.11.1)] Twenty-Third Asilomar Conference on Signals, Systems and Computers, 1989. - THCMOS: testable high speed CMOS design

Rajsuman, R., Gupta, B.

Year:

1989

Language:

english

File:

PDF, 365 KB

english, 1989

22

[Int. Test. Conference IEEE Computer Society International Test Conference (ICSM'99) - Atlantic City, NJ, USA (28-30 Sept. 1999)] International Test Conference 1999. Proceedings (IEEE Cat. No.99CH37034) - Testing a system-on-a-chip with embedded microprocessor

Year:

1999

Language:

english

File:

PDF, 945 KB

english, 1999

23

Testing of complex gates

Rajsuman, R., Jayasumana, A.P., Malaiya, Y.K.

Journal:

Electronics Letters

Year:

1987

Language:

english

File:

PDF, 284 KB

english, 1987

24

CMOS open-fault detection in the presence of glitches and timing skews

Rajsuman, R., Jayasumana, A.P., Malaiya, Y.K.

Journal:

IEEE Journal of Solid-State Circuits

Year:

1989

Language:

english

File:

PDF, 733 KB

english, 1989

25

[IEEE International Test Conference - Baltimore, MD, USA (30 Oct.-1 Nov. 2001)] Proceedings International Test Conference 2001 (Cat. No.01CH37260) - Test and repair of large embedded DRAMs. I

McConnell, R., Rajsuman, R.

Year:

2001

Language:

english

File:

PDF, 938 KB

english, 2001

26

[IEEE International Test Conference 2004 - Charlotte, NC, USA (26-28 Oct. 2004)] 2004 International Conferce on Test - Open architecture test system: system architecture and design

Rajsuman, R., Noriyuki, M.

Year:

2004

Language:

english

File:

PDF, 645 KB

english, 2004

27

[IEEE ASP-DAC 2004: Asia and South Pacific Design Automation Conference 2004 - Yohohama, Japan (27-30 Jan. 2004)] ASP-DAC 2004: Asia and South Pacific Design Automation Conference 2004 (IEEE Cat. No.04EX753) - Opportunities with the open architecture test system

Hatayama, K., Rajsuman, R., Cheng-Wen Wu,, Nishimura, Y., Chakradhar, S., Merschon, A., Petrich, D., Tada, T.

Year:

2004

Language:

english

File:

PDF, 37 KB

english, 2004

28

[IEEE [Proceedings] 1992 IEEE International Symposium on Circuits and Systems - San Diego, CA, USA (3-6 May 1992)] [Proceedings] 1992 IEEE International Symposium on Circuits and Systems - Fault detection in EEPLA

Rajsuman, R., Lala, P.K.

Year:

1992

Language:

english

File:

PDF, 428 KB

english, 1992

29

[IEEE Twenty Seventh Annual IEEE/CPMT/SEMI International Electronics Manufacturing Technology Symposium - San Jose, CA, USA (17-18 July 2002)] 27th Annual IEEE/SEMI International Electronics Manufacturing Technology Symposium - Bringing test to design: testing in the designer's event based environment

Year:

2002

Language:

english

File:

PDF, 322 KB

english, 2002

30

Special Issue on Digital Hardware Testing

Rajsuman, Rochit

Journal:

Year:

1994

Language:

english

File:

PDF, 1.28 MB

english, 1994

31

[IEEE Second IEEE International Workshop on Electronic Design, Test and Applications - Perth, Australia (28-30 Jan. 2004)] Second IEEE International Workshop on Electronic Design, Test and Applications - An Overview of the Open Architecture Test System

Year:

2004

Language:

english

File:

PDF, 130 KB

english, 2004

32

Comment on “Effects of Corona-Discharge-Induced Oxygen Ion Beams and Electric Fields on Silicon Oxidation Kinetics” [J. Electrochem. Soc., 132, 1659]

Journal:

Journal of The Electrochemical Society

Year:

1988

Language:

english

File:

PDF, 253 KB

english, 1988

33

STD Architecture: A Practical Approach to Test M-Bits Random Access Memories

Rajsuman, Rochit, Rajkanan, Kamal

Journal:

Year:

1994

Language:

english

File:

PDF, 2.40 MB

english, 1994

34

A new testing method for EEPLA

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

1994

Language:

english

File:

PDF, 514 KB

english, 1994

35

[IEEE Comput. Soc. Press [1992] 17th Conference on Local Computer Networks - Minneapolis, MN, USA (13-16 Sept. 1992)] [1992] Proceedings 17th Conference on Local Computer Networks - An analysis and simulation of multiple ring token networks

Vasko, D.A., Rajsuman, R.

Year:

1992

Language:

english

File:

PDF, 664 KB

english, 1992

36

[IEEE IEEE International Symposium on Circuits and Systems - New Orleans, LA, USA (1-3 May 1990)] IEEE International Symposium on Circuits and Systems - A new testable design of field programmable logic arrays

Rajsuman, R., Malaiya, Y.K., Jayasumana, A.P.

Year:

1990

Language:

english

File:

PDF, 426 KB

english, 1990

37

[IEEE [Proceedings] 1992 IEEE International Symposium on Circuits and Systems - San Diego, CA, USA (3-6 May 1992)] [Proceedings] 1992 IEEE International Symposium on Circuits and Systems - An algorithm and design to test random access memories

Year:

1992

Language:

english

File:

PDF, 429 KB

english, 1992

38

New algorithm for testing random access memories

Journal:

Electronics Letters

Year:

1991

Language:

english

File:

PDF, 308 KB

english, 1991

39

Limitations of switch level analysis for bridging faults

Rajsuman, R., Malaiya, Y.K., Jayasumana, A.P.

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

1989

Language:

english

File:

PDF, 589 KB

english, 1989

40

[IEEE IEEE International Workshop on Memory Technology, Design and Testing, - Singapore (August 13-14, 1996)] IEEE International Workshop on Memory Technology, Design and Testing, - Rambist builder: a methodology for automatic built-in self-test design of embedded rams

Year:

1996

Language:

english

File:

PDF, 559 KB

english, 1996

41

[IEEE Comput. Soc. Press [1991] Conference Record of the Twenty-Fifth Asilomar Conference on Signals, Systems & Computers - Pacific Grove, CA, USA (4-6 Nov. 1991)] [1991] Conference Record of the Twenty-Fifth Asilomar Conference on Signals, Systems & Computers - On the fault location in combinational logic circuits

Rajsuman, R., Saad, M., Gupta, B.

Year:

1991

Language:

english

File:

PDF, 451 KB

english, 1991

42

[IEEE Comput. Soc 17th IEEE VLSI Test Symposium - Dana Point, CA, USA (25-29 April 1999)] Proceedings 17th IEEE VLSI Test Symposium (Cat. No.PR00146) - Preliminary Outline of the IEEE PI 500 Scalable Architecture for Testing Embedded Cores

Adham, S., Burek, D., Clark, C.J., Collins, M., Giles, G., Sales, A., Marinissen, E.J., McLaurin, T., Monzel, J., Muradali, F., Rajoki, J., Rajsuman, R., Ricchatti, M., Stannard, D., Udell, J., Varma,

Year:

1999

Language:

english

File:

PDF, 496 KB

english, 1999

43

Guest Editorial Second Special Section of the IEEE Transactions on Instrumentation and Measurement in the Area of VLSI Testing—Future of Semiconductor Test

Das, S.R., Rajsuman, R.

Journal:

IEEE Transactions on Instrumentation and Measurement

Year:

2006

Language:

english

File:

PDF, 282 KB

english, 2006

44

[IEEE Digest of Papers 1991 VLSI Test Symposium 'Chip-to-System Test Concerns for the 90's - Atlantic City, NJ, USA (15-17 April 1991)] Digest of Papers 1991 VLSI Test Symposium 'Chip-to-System Test Concerns for the 90's - An analysis of feedback bridging faults in MOS VLSI

Year:

1991

File:

PDF, 336 KB

1991

45

[IEEE Digest of Papers 1991 VLSI Test Symposium 'Chip-to-System Test Concerns for the 90's - Atlantic City, NJ, USA (15-17 April 1991)] Digest of Papers 1991 VLSI Test Symposium 'Chip-to-System Test Concerns for the 90's - An analysis and testing of operation induced faults in MOS VLSI

Rajsuman, R., Jayasumana, A.P., Malaiya, Y.K., Park, J.

Year:

1991

File:

PDF, 431 KB

1991

46

[Int. Test Conference International Test Conference 2000 - Atlantic City, NJ, USA (3-5 Oct. 2000)] Proceedings International Test Conference 2000 (IEEE Cat. No.00CH37159) - A new paradigm in test for the next millennium

Katz, J., Rajsuman, R.

Year:

2000

Language:

english

File:

PDF, 1009 KB

english, 2000

47

Design of reprogrammable FPLA

Journal:

Electronics Letters

Year:

1989

Language:

english

File:

PDF, 230 KB

english, 1989

48

Testable design of BiCMOS circuits for stuck-open fault detection using single patterns

Menon, S.M., Malaiya, Y.K., Jayasumana, A.P., Rajsuman, R.

Journal:

IEEE Journal of Solid-State Circuits

Year:

1995

Language:

english

File:

PDF, 1.01 MB

english, 1995

49

[IEEE 1998 IEEE International Workshop on IDDQ Testing - San Jose, CA, USA (November 12-13, 1998)] Proceedings 1998 IEEE International Workshop on IDDQ Testing (Cat. No.98EX232) - Design-for-Iddq-testing for embedded cores based system-on-a-chip

Year:

1998

Language:

english

File:

PDF, 960 KB

english, 1998

50

[IEEE IEEE/CPMT/SEMI 29th International Electronics Manufacturing Technology Symposium - San Jose, CA, USA (14-16 July 2004)] IEEE/CPMT/SEMI 29th International Electronics Manufacturing Technology Symposium (IEEE Cat. No.04CH37585) - How to employ multi-GHz analog and RF modules in open architecture ATE

Rajsuman, R., Kushnick, E., Perez, S.

Year:

2004

Language:

english

File:

PDF, 335 KB

english, 2004

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